IRIS-HEP Fellow: Aneesh Heintz



Fellowship dates: June - September 2020
Home Institution: Cornell University


Implementation of graph neural networks on CPU + FPGA co-processors for scalable track reconstruction tasks

Run 2 of the LHC on the CMS detector produced a data rate on the scale of hundreds of terabytes per second. Being able to reduce the data within a few milliseconds and sift through the data in a reasonable time frame to produce meaningful results is crucially important. Future increases in instantaneous luminosity, meaning more proton-proton collisions per bunch-crossing, will lead to data produced at increasingly larger rates, causing scalability issues in traditional particle track reconstruction algorithms. This project proposes to implement a graph network that can be evaluated on a CPU that has a FPGA co-processors. This will allow trained networks to be run online in a highly parallelized fashion, greatly accelerating data throughput.

More information: My project proposal

Mentors:
  • Isobel Ojalvo (Princeton University)



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